/**
 @file ctc_ptp.h

 @date 2010-5-25

 @version v2.0

 This file contains IEEE1588 PTP related data structure, enum, macro.

*/

#ifndef _CTC_PTP_H
#define _CTC_PTP_H
#ifdef __cplusplus
extern "C" {
#endif
/****************************************************************
 *
 * Header Files
 *
 ***************************************************************/
#include "common/include/ctc_const.h"

/****************************************************************
*
* Defines and Macros
*
****************************************************************/
/**
 @defgroup ptp PTP
 @{
*/

/**
 @brief define ptp global prop
*/
enum ctc_ptp_global_prop_s
{
    CTC_PTP_GLOBAL_PROP_PTP_UCASE_EN = 0,           /**< [GB] if set,  PTP ucast will be processed, default enable*/
    CTC_PTP_GLOBAL_PROP_SYNC_COPY_TO_CPU_EN,        /**< [GB] if set, TC will copy sync and follow_up message to CPU */
    CTC_PTP_GLOBAL_PROP_SIGNALING_COPY_TO_CPU_EN,   /**< [GB] if set, TC will copy signaling message to CPU */
    CTC_PTP_GLOBAL_PROP_MANAGEMENT_COPY_TO_CPU_EN,  /**< [GB] if set, TC will copy management message to CPU*/
    CTC_PTP_GLOBAL_PROP_DELAY_REQUEST_PROCESS_EN,   /**< [GB] if set, P2P transparent clock will process Delay_Request message*/
    CTC_PTP_GLOBAL_PROP_PORT_BASED_PTP_EN,          /**< [GB.D2.TM.TMM.AT] if set, PTP will be enabled by port or vlan, default by port*/
    CTC_PTP_GLOBAL_PROP_CACHE_AGING_TIME,           /**< [GB.GG.D2.TM] aging time for TS, unit:seconds*/
    CTC_PTP_GLOBAL_PROP_SYNC_OR_TOD_INPUT_SELECT,   /**< [GB.GG.D2.TM.TMM.AT] select Sync Interface or ToD Interface to synchronize from master clock */
    CTC_PTP_GLOBAL_PROP_SEQ_ID_FROM_CPU,            /**< if set, tx capture time will use seq id from cpu*/
    MAX_CTC_PTP_GLOBAL_PROP
};
typedef enum ctc_ptp_global_prop_s ctc_ptp_global_prop_t;
/**
 @brief define ptp clock frq
*/
enum ctc_ptp_clock_frq_e
{
    CTC_PTP_CLOCK_FRQ_0,      /**< [TM.TMM] 100M  */
    CTC_PTP_CLOCK_FRQ_1,      /**< [TM.TMM] 125M  */
    CTC_PTP_CLOCK_FRQ_2,      /**< [TM.TMM] 250M  */
    CTC_PTP_CLOCK_FRQ_MAX
};
typedef enum ctc_ptp_clock_frq_e ctc_ptp_clock_frq_t;

/**
 @brief  define type for delay adjust
*/
enum ctc_ptp_adjust_delay_type_e
{
    CTC_PTP_ADJUST_DELAY_INGRESS_LATENCY = 0,   /**< [GB.GG.D2.TM.TMM.AT] latency from phy to mac on RX, <0-0xFFFF>*/
    CTC_PTP_ADJUST_DELAY_EGRESS_LATENCY,        /**< [GB.GG.D2.TM.TMM.AT] latency from mac to phy on TX, <0-0xFFFF>*/
    CTC_PTP_ADJUST_DELAY_INGRESS_ASYMMETRY,     /**< [GB.GG.D2.TM.TMM.AT] asymmetry on ingress, <(-0x000FFFFFFFFF)-0x000FFFFFFFFF> */
    CTC_PTP_ADJUST_DELAY_EGRESS_ASYMMETRY,      /**< [GB.GG.D2.TM.TMM.AT] asymmetry on egress, <(-0x000FFFFFFFFF)-0x000FFFFFFFFF>*/
    CTC_PTP_ADJUST_DELAY_PATH_DELAY,            /**< [GB.GG.D2.TM.TMM.AT] path delay, <0-0x000FFFFFFFFF>*/

    MAX_CTC_PTP_ADJUST_DELAY
};
typedef enum ctc_ptp_adjust_delay_type_e ctc_ptp_adjust_delay_type_t;

/**
 @brief  define PTP device type
*/
enum ctc_ptp_device_type_e
{
    CTC_PTP_DEVICE_NONE = 0,    /**< [GB.GG.D2.TM.TMM.AT] blind for PTP message,forward it as normal packet*/
    CTC_PTP_DEVICE_OC,          /**< [GB.GG.D2.TM.TMM.AT] ordinary clock device*/
    CTC_PTP_DEVICE_BC,          /**< [GB.GG.D2.TM.TMM.AT] boundary clock device*/
    CTC_PTP_DEVICE_E2E_TC,      /**< [GB.GG.D2.TM.TMM.AT] end-to-end transparent clock device or E2ETC+OC/BC*/
    CTC_PTP_DEVICE_P2P_TC,      /**< [GB.GG.D2.TM.TMM.AT] peer-to-peer transparent clock device or P2PTC+OC/BC*/

    MAX_CTC_PTP_DEVICE
};
typedef enum ctc_ptp_device_type_e ctc_ptp_device_type_t;

/**
 @brief  captured ts type
*/
enum ctc_ptp_captured_type_e
{
    CTC_PTP_CAPTURED_TYPE_TX = 0,    /**< [GB.GG.TMM.AT] TS captured type is TX*/
    CTC_PTP_CAPTURED_TYPE_RX,        /**< [GB.GG.D2.TM.TMM.AT] TS captured type is RX*/
    CTC_PTP_CAPTURED_TYPE_TX_FLEXE,  /**< [TMM.AT] TS captured type is TX of FlexE*/

    CTC_PTP_CAPTURED_MAX
};
typedef enum ctc_ptp_captured_type_e ctc_ptp_captured_type_t;

/**
 @brief  define input captured source
*/
enum ctc_ptp_captured_src_e
{
    CTC_PTP_TIEM_INTF_GPIO_0,           /**< [GB.GG.D2.TM.TMM.AT] TS captured source is GPIO capture 0*/
    CTC_PTP_TIEM_INTF_GPIO_1,           /**< [GB.GG.D2.TM.TMM.AT] TS captured source is GPIO capture 1*/
    CTC_PTP_TIEM_INTF_SYNCE_0,          /**< [GB.GG.D2.TM.TMM.AT] TS captured source is syncE clock 0*/
    CTC_PTP_TIEM_INTF_SYNCE_1,          /**< [GB.GG.D2.TM.TMM.AT] TS captured source is syncE clock 1*/
    CTC_PTP_TIEM_INTF_SERDES,           /**< [GB.GG.D2.TM.TMM] TS captured source is Serdes reference clock*/
    CTC_PTP_TIEM_INTF_SYNC_PULSE = 5,   /**< [GB.GG.D2.TM.TMM.AT] TS captured source is Sync Interface*/
    CTC_PTP_TIEM_INTF_TOD_1PPS = 6,     /**< [GB.GG.D2.TM.TMM.AT] TS captured source is ToD Interface*/
    CTC_PTP_TIEM_INTF_SYNC_PULSE_1,     /**< [AT] TS captured source is Sync Interface*/

    MAX_CTC_PTP_TIEM_INTF
};
typedef enum ctc_ptp_captured_src_e ctc_ptp_captured_src_t;

/**
 @brief  define Sync or ToD Interface selected
*/
enum ctc_ptp_intf_selected_e
{
    CTC_PTP_INTF_SELECT_NONE,         /**< [GB.GG.D2.TM.TMM.AT] Select none to sync*/
    CTC_PTP_INTF_SELECT_SYNC,         /**< [GB.GG.D2.TM.TMM.AT] Select Sync Interface to sync*/
    CTC_PTP_INTF_SELECT_TOD,          /**< [GB.GG.D2.TM.TMM.AT] Select ToD Interface to sync*/

    MAX_CTC_PTP_INTF_SELECT
};
typedef enum ctc_ptp_intf_selected_e ctc_ptp_intf_selected_t;

/**
 @brief   ptp init global config
*/
struct ctc_ptp_global_config_s
{
    uint8  ptp_ucast_en;                  /**< [GB] if set,  PTP ucast will be processed, (default: 1)*/
    uint8  sync_copy_to_cpu_en;           /**< [GB] if set, TC will copy sync and follow_up message to CPU, (default: 0) */
    uint8  signaling_copy_to_cpu_en;      /**< [GB] if set, TC will copy signaling message to CPU, (default: 0)*/
    uint8  management_copy_to_cpu_en;     /**<  [GB] if set, TC will copy management message to CPU, (default: 0)*/

    uint8  delay_request_process_en;      /**< [GB] if set, P2P transparent clock will process Delay_Request message, (default: 1)*/
    uint8  port_based_ptp_en;             /**< [GB] if set, PTP will be enabled by port or vlan, default by port, (default: 1)*/
    uint16 cache_aging_time;              /**< [GB.GG.D2.TM] aging time for TS, unit:seconds, (default: 60)*/
    uint8  use_internal_clock_en;         /**< [D2.TM.TMM.AT] If set, the ptp source clock will use internal clock, else use external clock, (default: 1)*/
    uint8  rsv[3];
    ctc_ptp_intf_selected_t  intf_selected;  /**< [GB.GG.D2.TM.TMM.AT] select Sync Interface or ToD Interface to synchronize from master clock, (default: 0)*/
    uint8  clock_frq;                        /**< [TMM.AT] indicate ptp's clock is ctc_ptp_clock_frq_t */ 
};
typedef struct ctc_ptp_global_config_s ctc_ptp_global_config_t;

/**
 @brief   ptp frc time
*/
struct ctc_ptp_time_s
{
    uint32 seconds;           /**< [GB.GG.D2.TM.TMM.AT] seconds*/
    uint32 nanoseconds;       /**< [GB.GG.D2.TM.TMM.AT] nano seconds*/
    uint32 nano_nanoseconds;  /**< [GB.GG.D2.TM.TMM.AT] nano nano seconds*/
    uint8  is_negative;       /**< [GB.GG.D2.TM.TMM.AT] negative time indicator*/
    uint8  domain_id;         /**< [AT] clock domain id*/
    uint32 adjust_count;      /**< [AT] how many cycles used for adjust clock offset, default:100000*/
    uint8  resv[2];
};
typedef struct ctc_ptp_time_s ctc_ptp_time_t;

/**
 @brief   ptp tod or sync interface mode
*/
enum ctc_ptp_intf_mode_e
{
    CTC_PTP_INTF_MODE_INPUT,         /**< [D2.TM.TMM.AT][TOD,SYNC] input mode*/
    CTC_PTP_INTF_MODE_OUTPUT,        /**< [D2.TM.TMM.AT][TOD,SYNC] output mode*/
    CTC_PTP_INTF_MODE_DISABLE,       /**< [D2.TM.TMM.AT][TOD] disable mode*/
    CTC_PTP_INTF_MODE_1PPS_ONLY,     /**< [D2.TM.TMM.AT][TOD,SYNC] input mode with pulse only*/

    CTC_PTP_INTF_MODE_MAX
};
typedef enum ctc_ptp_intf_mode_e ctc_ptp_intf_mode_t;


/**
 @brief   ptp Sync interface configurations
*/
struct ctc_ptp_sync_intf_cfg_s
{
    uint8  mode;               /**< [GG.D2.TM.TMM.AT] 0: input, 1: output, 3: 1pps-only*/
    uint8  lock;               /**< [GB.GG.D2.TM.TMM.AT] indicating the clock accuracy is better than some threshold*/
    uint8  accuracy;           /**< [GB.GG.D2.TM.TMM.AT] timer accuracy, <32-49, or 0xFE>*/
    uint8  resv0;

    uint32 sync_clock_hz;      /**< [GB.GG.D2.TM.TMM.AT] sycnClock signal frequency, <0-25000000>*/
    uint32 sync_pulse_hz;      /**< [GB.GG.D2.TM.TMM.AT] sycnPulse signal frequency, <0-250000>*/

    uint8  sync_pulse_duty;    /**< [GB.GG.D2.TM.TMM] the duty of syncPulse signal, value range is <1-99>*/
    uint8  epoch;              /**< [GG.D2.TM.TMM.AT] indicate how many syncClock cycle will be by-passed before send the first bit of time code,<0-63>*/

    uint8  hw_mode;            /**< [TMM.AT] hardware mode, 0: process in host cpu, 1: process in eunit, valid when mode is input*/
    uint8  drift_time;         /**< [TMM.AT] adjust drift time, 0 indicate disable, valid when hw_mode is set, unit:s*/

    uint8  domain_id;          /**< [AT] clock domain id*/
    uint8  resv[3];
};
typedef struct ctc_ptp_sync_intf_cfg_s ctc_ptp_sync_intf_cfg_t;

/**
 @brief   ptp Sync interface input timescode
*/
struct ctc_ptp_sync_intf_code_s
{
    uint32 seconds;       /**< [GB.GG.D2.TM.TMM.AT] second of input time*/
    uint32 nanoseconds;   /**< [GB.GG.D2.TM.TMM.AT] nano second input time*/
    uint8  lock;          /**< [GB.GG.D2.TM.TMM.AT] lock status from input*/
    uint8  accuracy;      /**< [GB.GG.D2.TM.TMM.AT] timer accuracy*/
    uint8  crc_error;     /**< [GB.GG.D2.TM.TMM.AT] crc error status*/
    uint8  crc;           /**< [GB.GG.D2.TM.TMM.AT] crc*/
    uint8  domain_id;     /**< [AT] clock domain id*/
};
typedef struct ctc_ptp_sync_intf_code_s ctc_ptp_sync_intf_code_t;

/**
 @brief   ptp ToD interface configurations
*/
struct ctc_ptp_tod_intf_cfg_s
{
    uint8  mode;                /**< [GB.GG.D2.TM.TMM.AT] 0: input mode, 1: output mode, 2: disable, 3: 1pps-only */
    uint8  pulse_duty;          /**< [GB.GG.D2.TM.TMM.AT] the duty of 1pps signal, value range is <1-99>*/
    uint8  flex_en;             /**< [TMM.AT] If set, indicate ToD frame flex format*/
    uint8  rsv;

    uint16 stop_bit_num;        /**< [GB.GG.D2.TM.TMM] except for default 1 stop bit, how many stop bits will be sent*/
    uint16 epoch;               /**< [GG.D2.TM.TMM] indicate how many clock cycle will be by-passed before send the first bit of time code,GB:<0,0xFFF>,
                                      1ms=epoch*1024/clockCore(M)/1000, GG:<0,0x7FFF>, 1ms=epoch*512/clockCore(M)/1000*/

    uint32 pulse_delay;         /**< [GB.GG.D2.TM.TMM.AT] 1pps delay between master and slave, unit is ns, if (pulse_delay>>31)>0 means delay<0>*/
    uint32 pulse_delay_nns;     /**< [AT] 1pps delay between master and slave, unit is nand_ns, >*/ 

    uint32 thrd;                /**< [D2.TM.TMM] adjust threshold, used for CTC_PTP_INTF_MODE_1PPS_ONLY and CTC_PTP_INTF_MODE_INPUT, unit is ns,
                                    and when its vlaue is equal to 0xffffffff, means do not adjust timestamp by SDK*/
    uint8  domain_id;           /**< [AT] clock domain id, used for select which domain ts to ToD send*/
};
typedef struct ctc_ptp_tod_intf_cfg_s ctc_ptp_tod_intf_cfg_t;


/**
 @brief   ptp ToD interface input message
*/
struct ctc_ptp_tod_intf_code_s
{
    uint8  msg_char0;   /**< [GB.GG.D2.TM.TMM.AT] char0 of message, used for input mode*/
    uint8  msg_char1;   /**< [GB.GG.D2.TM.TMM.AT] char1 of message, used for input mode*/
    uint8  msg_class;   /**< [GB.GG.D2.TM.TMM.AT] class of message, used for input and output mode*/
    uint8  msg_id;      /**< [GB.GG.D2.TM.TMM.AT] identify of this message, used for input and output mode*/

    uint16 msg_length;  /**< [GB.GG.D2.TM.TMM.AT] length of the payload of this message, used for input and output mode*/
    uint16 gps_week;    /**< [GB.GG.D2.TM.TMM.AT] GPS week, used for input mode*/

    uint32 gps_second_time_of_week; /**< [GB.GG.D2.TM] GPS Second time of week, used for input mode*/

    int8   leap_second; /**< [GB.GG.D2.TM.TMM.AT] Leap seconds between GPS and UTC, used for input and output mode*/
    uint8  pps_status;  /**< [GB.GG.D2.TM.TMM.AT] 1PPS status <0-0xFF>, used for input and output mode*/
    uint8  pps_accuracy;/**< [GB.GG.D2.TM.TMM.AT] 1PPS accuracy, used for input and output mode*/
    uint8  crc_error;   /**< [GB.GG.D2.TM.TMM.AT] crc error status, used for input mode*/

    uint8  crc;                 /**< [GB.GG.D2.TM.TMM.AT] crc, used for input mode*/
    uint8  clock_src;           /**< [GB.GG.D2.TM.TMM.AT] clock source <0-3>, used for output mode */
    uint16 clock_src_status;    /**< [GB.GG.D2.TM.TMM.AT] clock source work status, used for output mode */

    uint16 monitor_alarm;       /**< [GB.GG.D2.TM.TMM.AT] monitor alarm, used for output mode */
    uint16 resv;

};
typedef struct ctc_ptp_tod_intf_code_s ctc_ptp_tod_intf_code_t;

/**
 @brief   ptp ToD interface input message
*/
struct ctc_ptp_tod_flex_code_s
{
    uint16 length;          /**< [TMM.AT] length of this message, used for input and output mode*/
    uint8* data;            /**< [TMM.AT] ToD message for user defined frame format*/
};
typedef struct ctc_ptp_tod_flex_code_s ctc_ptp_tod_flex_code_t;

/**
 @brief   ptp captured timestamp
*/
struct ctc_ptp_capured_ts_s
{
    ctc_ptp_captured_type_t  type;   /**< [GB.GG.D2.TM.TMM.AT] captured ts type */
    union
    {
        uint16  lport;         /**< [GB.GG] captured port for tx*/
        uint8  captured_src;   /**< [GB.GG.D2.TM.TMM.AT] captured source for rx, 5:syncPulse; 6:1PPS, refert to ctc_ptp_captured_src_t*/
        uint16 serdes_id;      /**< [TMM] Serdes id, used for FlexE */
    } u;
    uint16  seq_id;            /**< [GB.GG.D2.TM.TMM.AT] sequence ID*/
    ctc_ptp_time_t ts;         /**< [GB.GG.D2.TM.TMM.AT] ts*/
    uint8 msg_type;            /**< [TMM.AT] ptp msgtype, refer to ctc_ptp_msg_type_t*/
    uint8 rsv;
};
typedef struct ctc_ptp_capured_ts_s ctc_ptp_capured_ts_t;

/**
 @brief   TX ts callback date for isr
*/
#define CTC_PTP_TX_TS_CACHE_MAX (256)
struct ctc_ptp_ts_cache_s
{
    uint8 entry_count;                                   /**< [GB.GG.D2.TM.TMM.AT] the total number of entry*/
    uint8 resv[3];
    ctc_ptp_capured_ts_t entry[CTC_PTP_TX_TS_CACHE_MAX]; /**< [GG.D2.TM.TMM.AT] TX captured entry*/
};
typedef struct ctc_ptp_ts_cache_s ctc_ptp_ts_cache_t;

/**
 @brief   RX time messge callback data for isr
*/
struct ctc_ptp_rx_ts_message_s
{
    ctc_ptp_captured_src_t source;                     /**< [GG.D2.TM.TMM.AT] RX captured source*/
    union
    {
        ctc_ptp_sync_intf_code_t  sync_intf_message;   /**< [GB.GG.D2.TM.TMM.AT] Sync Interface input message*/
        ctc_ptp_tod_intf_code_t   tod_intf_message;    /**< [GB.GG.D2.TM.TMM.AT] ToD Interface input message*/
        ctc_ptp_tod_flex_code_t   flex;                /**< [TMM.AT] ToD Interface input message in flex frame format*/
    } u;
    ctc_ptp_time_t captured_ts;                        /**< [GB.GG.D2.TM.TMM.AT] captured TS*/
    uint8  domain_id;                                  /**< [AT] clock domain id*/
};
typedef struct ctc_ptp_rx_ts_message_s ctc_ptp_rx_ts_message_t;

/**
 @brief  define ptp message type
*/
enum ctc_ptp_msg_type_e
{
    CTC_PTP_MSG_TYPE_SYNC = 0,              /**< [GG.D2.TM.TMM.AT] sync message type*/
    CTC_PTP_MSG_TYPE_DELAY_REQ,             /**< [GG.D2.TM.TMM.AT] delay request message type*/
    CTC_PTP_MSG_TYPE_PDELAY_REQ,            /**< [GG.D2.TM.TMM.AT] peer delay request message type*/
    CTC_PTP_MSG_TYPE_PDELAY_RESP,           /**< [GG.D2.TM.TMM.AT] peer delay response message type*/
    CTC_PTP_MSG_TYPE_FOLLOW_UP = 8,         /**< [GG.D2.TM.TMM.AT] follow up message type*/
    CTC_PTP_MSG_TYPE_DELAY_RESP,            /**< [GG.D2.TM.TMM.AT] delay response message type*/
    CTC_PTP_MSG_TYPE_PDELAY_RESP_FOLLOW_UP, /**< [GG.D2.TM.TMM.AT] peer delay response follow up message type*/
    CTC_PTP_MSG_TYPE_ANNOUNCE,              /**< [GG.D2.TM.TMM.AT] announce message type*/
    CTC_PTP_MSG_TYPE_SIGNAL,                /**< [GG.D2.TM.TMM.AT] signaling message type*/
    CTC_PTP_MSG_TYPE_MANAGEMENT,            /**< [GG.D2.TM.TMM.AT] management message type*/
    CTC_PTP_MSG_TYPE_MAX = 16
};
typedef enum ctc_ptp_msg_type_e ctc_ptp_msg_type_t;

/**
 @brief  define ptp action flag
*/
enum ctc_ptp_action_flag_e
{
    CTC_PTP_ACTION_FLAG_DISCARD         = 0x0001,        /**< [GG.D2.TM.TMM.AT] discard message, per message type control*/
    CTC_PTP_ACTION_FLAG_COPY_TO_CPU     = 0x0002,        /**< [GG.D2.TM.TMM.AT] copy message to cpu, per message type control*/
    CTC_PTP_ACTION_FLAG_RESIDENCE_TIME  = 0x0004,        /**< [GG.D2.TM.TMM.AT] update the residence time, per message type control*/
    CTC_PTP_ACTION_FLAG_PATH_DELAY      = 0x0008,        /**< [GG.D2.TM.TMM.AT] apply the path delay time, per message type control*/
    CTC_PTP_ACTION_FLAG_IGS_ASYM_DELAY  = 0x0010,        /**< [GG.D2.TM.TMM.AT] apply the ingress asymmetry delay time, per message type control*/
    CTC_PTP_ACTION_FLAG_EGS_ASYM_DELAY  = 0x0020         /**< [GG.D2.TM.TMM.AT] apply the egress asymmetry delay time, per message type control*/
};
typedef enum ctc_ptp_action_flag_e ctc_ptp_action_flag_t;

/**
 @brief   ptp device clock type config
*/
struct ctc_ptp_clock_s
{
    uint8 clock_id;           /**< [GG.D2.TM.TMM.AT] clock id, <2-7>, 0 is disable, 1 is a standard clock of OC/BC/E2E_TC/P2P_TC refer to ctc_ptp_device_type_e */
    uint8 domain_id;          /**< [AT] clock domain id*/
    uint16 cpu_reason;        /**< [AT] CPU reason for domain 1, and domain 0 usw the reason CTC_PKT_CPU_REASON_PTP*/

    uint32 action_flag[CTC_PTP_MSG_TYPE_MAX]; /**< [GG.D2.TM.TMM.AT] ptp action flag, ref ctc_ptp_action_flag_t, per ctc_ptp_msg_type_t control*/
};
typedef struct ctc_ptp_clock_s ctc_ptp_clock_t;

/**
 @brief   ptp default config
*/
struct ctc_ptp_default_info_s
{
    /* Static members */
    uint8 clock_identity[8];   /**< [AT] Clock identity in ptp packet*/
    uint8 two_step_flag;      /**< [AT] Two step flag in ptp packet*/
    uint8 domain_number;      /**< [AT] Domain_number in ptp packet*/
    uint16 port_num;           /**< [AT] Default port number for send ptp packet*/
};
typedef struct ctc_ptp_default_info_s ctc_ptp_default_info_t;

/**
 @brief   ptp port config
*/
struct ctc_ptp_port_info_s
{
    int8 delay_req_interval;  /**< [AT] Delay request packet tx interval, and the value is 2^n */
    int8 sync_interval;       /**< [AT] Sync packet tx interval, and the value is 2^n */
    int8 pdelay_req_interval; /**< [AT] Pdelay request packet tx interval, and the value is 2^n */
    uint8 version_id;         /**< [AT] Version id in ptp packet */
    uint16 source_port_id;    /**< [AT] Port number in ptp packet */
};
typedef struct ctc_ptp_port_info_s ctc_ptp_port_info_t;

/**
 @brief   ptp parent config
*/
struct ctc_ptp_parent_info_s
{ 
    uint8 parent_identity[8];        /**< [AT] Parent identity for handle ptp packet*/
    uint16 parent_port_num;          /**< [AT] Parent port number for handle ptp packet*/
};
typedef struct ctc_ptp_parent_info_s ctc_ptp_parent_info_t;

/**
 @brief   ptp session config
*/
struct ctc_ptp_session_s
{
    uint32 gport;                               /**< [AT] Gport id which binded the ptp session */
    uint8  domain_id;                           /**< [AT] PTP domain id */

    /*device control*/
    uint16 tx_en;                               /**< [AT] PTP message tx enable bitmap */
    uint16 rx_en;                               /**< [AT] PTP message rx enable bitmap */
    uint16 report_msg_en;                       /**< [AT][RX] PTP message report bitmap*/
    uint8  report_ts_en;                        /**< [AT][RX] PTP session will report ts when port in slave */
    uint8  ext_len;                             /**< [AT][RX] PTP message extend len*/

    /*msg info*/
    ctc_ptp_parent_info_t parent_info;          /**< [AT] Paernt info for ptp packet*/
    ctc_ptp_default_info_t default_info;        /**< [AT] Default info for ptp packet*/
    ctc_ptp_port_info_t port_info;              /**< [AT] Port info for ptp packet*/

    /*dest info*/
    uint32 nhid1;                               /**< [AT] Nexthop id for event message*/
    uint32 nhid2;                               /**< [AT] Nexthop id for general message*/

    /*debug stats*/
    uint32 tx_stats[CTC_PTP_MSG_TYPE_MAX];      /**< [AT][out] Tx stats */
    uint32 rx_stats[CTC_PTP_MSG_TYPE_MAX];      /**< [AT][out] Rx stats */
    uint32 drop_stats[CTC_PTP_MSG_TYPE_MAX];    /**< [AT][out] Drop stats */
};
typedef struct ctc_ptp_session_s ctc_ptp_session_t;

/**
 @brief   ptp slave receive timestamp
*/
struct ctc_ptp_slave_rx_ts_s
{
    uint32 gport;            /**< [AT] Gport id */
    ctc_ptp_time_t rx_ts0;   /**< [AT] Timestamp, T1 or T3*/
    ctc_ptp_time_t rx_ts1;   /**< [AT] Timestamp, T2 or T4*/
    uint32 cf[2];            /**< [AT] Correction field*/
    uint8 is_t1_t2;          /**< [AT] Timestamp pair flag, T1 and T2 or T3 and T4 pair */
    uint8 domain_id;         /**< [AT] PTP domain id */
};
typedef struct ctc_ptp_slave_rx_ts_s ctc_ptp_slave_rx_ts_t;


/**@} end of @defgroup  ptp PTP */

#ifdef __cplusplus
}
#endif

#endif

